1. Field of the Invention
This invention generally relates to system-on-chip (SoC) processor core management and, more particularly, to a system and method processor core and supporting hardware dedicated to low power standby mode operations.
2. Description of the Related Art
There are a number of mid to high-end electronic systems such as multifunction enterprise and home printers, enterprise and home routers/gateways, and enterprise and home wireless access points, etc. These systems have become necessary for residential and business applications. Conventionally, these devices are switched-on and networked with other devices at all times, even if they not performing data path processing. In fact, actual data path processing is typically very low. As an example, a small business printer is unlikely to print documents throughout the day, and almost never performs any tasks in the night. Keeping these device switched on at all the times is a waste of power. However, if they are switched off, the devices are not able to reply to system and network control messages, or perform housekeeping activities.
Conventionally, the solution to this problem is to put the systems into a power-save mode. However, this solution has the following deficiencies. When the system is in power-down or power-save mode, the system is unable to respond to network prompted or internal tasks. The only event it responds to is a command putting the system back in full power-up mode. Thus, to reply to a simple network control message, all the system resources are brought back to working in the full-power mode, including resources that are not used for the reply. After returning to the full-power mode, the system becomes fully functional and wastes power while not performing any significant tasks.
The system goes back into power-down mode again only after waiting for a while for inactivity or any other defined algorithm. When the system is in power-down mode, it can't perform any functions, and thus, is not able to perform any housekeeping activities, which are generally done on timer events. Again, the system has to fully wake up and be put in full-power mode to service the timer event for housekeeping activities, which again wastes power unnecessarily.
It would be advantageous if a SoC was able to perform low level tasks without operating in a full power mode.